Download this file to build this part BETTER_FAKE_DRAM.zip

The FAKE_DRAM SIMPLE_BGA spreadsheet shows the layout of the pins of the fictional DRAM part built for this example

The SIMPLE_BGA PIN_REPORT_FILE is shown above, the PIN_NAMES are layed out in columns and rows, and PartBuilder will create the PIN_NUMBERS by merging the Columns in the "!COL" Column and the row number across the top of the "!COL" row.

For example the DQ[6] pin will be resolved to pin L2, VREF will be found at pin D7, and RAS_N will be found at T5. The names for multiply occurring pins like GND and VCCD will be uniquifed and assigned valid pin numbers

Row 24 starts the assignment of PIN_OVERRIDE Assignments (this could also be provided in an external file so the user would only cut and paste the existing table from a pdf into this spreadsheet view. ROW 25 says all pin_names containing DQ should be assigned the INOUT pin_type, ROW 28 says any pin containing enb should be assigned the input PIN_TYPE.

Here is a screenshot of PartBuilder after successfully building the part.

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