Important Configuration Settings (CSETS) that were changed

Entry	Contents	Purpose	Notes
SIG_RENAME_RULES	DQS$:DQS_P,CK$:CK_P,#$:_N,A10:A10_AP,A12:A12_BC_N	changes any pin ending in # to _N adds P to any pin ending in CK (so CK->CK_P) adds P to any pin ending in DQS (so LDQS->LDQS_P) they can be identified as diff pairs It also add AP suffix to A10 pin A10_AP and the _BCN suffix to A12 pin (A12_BC_N) (These suffixes did not appear in IBIS model)	we can also store this in a rename_rules.txt file and change the entry to rename_rules.txt if we do use the file, we need to add a backslash in front of the '#' character so that partBuilder does not think its a comment rename_rules.txt would look like this: DQS$:DQS_P CK$:CK_P \#$:_N A10:A10_AP A12:A12_BC_N
PCHK_DEVICE_PIN_NUMBERS	BGA_PIN_NUMS[A1..T3],BGA_PIN_NUMS[A7..T9]	Tells partBuilder what valid pin numbers to expect
IBIS_COMPONENT_PACKAGE	MT41K512M16HA:v91a_96ball_pkg	Tells partBuilder to use the 96 PIN component from the IBIS_FILE	This was setup when PartBuilder prompted the user to select from the list of components found in the IBIS FILE
NUM_PINS	96	Tells partBuilder to expect 96 pins	This was setup by PartBuilder the first time it read the 96 pin IBIS component

PinName Matches

purpose

notes

^A[15:0],^ck,dqs,#

shows us all the Address, clock and dqs pins and also the pins ending in '#'

we use this before we add the rename_rules to show what we get out of ibis

then we add the rename rules and re-read the pins to show how the names get changed

VREF

we use this match to find the VREF pins

we will remap the matching pins from power to input, which will make smart-frac work better,

we will also remap the pin_group to ALL_SIGNAL_PINS which will have a beneficial effect when the next smart-frac update is released

ZQ

we use this match to find the ZQ pin

we will remap the pin_type from power to analog

we will also remap the pin_group to ALL_SIGNAL_PINS which will have a beneficial effect when the next smart-frac update is released