The Structure and Syntax of the CadEnhance Symbol Description Language (SDL) is described here
Symbol Description Language Structure
The Symbol Description Language was designed to be efficient, simple to understand and easy to enter.
An SDL File is a collection of ordered SYMBOL_NAME_DEFINITIONs enclosing MATCH_STATEMENTS and Spacer_Commands.
SYMBOL_NAME_DEFINITIONs and MATCH_STATEMENTS and Spacer_Commands can also appear between the start and end of special Loop_Directives
SDL also supports Simple Variable Substitution commands.
SYMBOL_NAME_DEFINITION
A SYMBOL_NAME_DEFINITION is used to instruct partBuilder to start organizing pins into a named symbol.
It has 2 parts, a beginning:
SymbolName=
and an end which is just the terminating semicolon.
';'
The SymbolName is the actual name you want to use for the symbol and it should not contain spaces
in the simple sample file, the start of the first SYMBOL_NAME_DEFINITION was
DRAM_ACTL_PINS=
That was followed by several MATCH_STATEMENTS
and was terminated by the
';'
character
It instructed partBuilder to reserve a Symbol named DRAM_ACTL_PINS as a place to add the pins matching the containing MATCH_STATEMENTS that follow.
MATCH_STATEMENTS
MATCH_STATEMENTS are what tell partBuilder which pins to place within the current symbol, what side to place them on and any other modifier to enable creating special graphics or properites for the pins that match.
MATCH_STATEMENTS are built out of LOCATOR, MODIFIER and PIN_MATCH elements
The simplest MATCH_STATEMENT only contains a LOCATOR and a PIN_MATCH, and is entered as
LOCATOR=>PIN_MATCH
The equal-Arrow "=>" separates the PIN_MATCH from the list of LOCATORS and MODIFIERS
MODIFIERS are added on the left hand side of the '=>' either before or after the LOCATOR.
For clarity and easier cut and paste in Excel, our examples will show the LOCATOR first.
MODIFIERS and LOCATORS are separated by the colon character ':' as follows;
LOCATOR:MODIFIER1:MODIFIER2:...MODIFIERn=>PIN_MATCH
There is no restriction on the number of valid MODIFIERS that can be included in a MATCH_STATEMENT.
It should be obvious that only one LOCATOR is used per MATCH_STATEMENT
Examples of Simple MATCH_STATEMENTS.
| MATCH_STATEMENT | Simple Operation* | Notes |
|---|---|---|
| left=>a[15:0] | puts bus pins a15...a0 on the left hand side of the symbol starting from the current position on the left hand side | |
right:dpair=>clk_p | puts diff_pair mates clk_p and clk_n** consceutively on the right hand side of the symbol using the currently configured defaults for diff pair spacing | **presumably clk_n |
| top:is_pin=>1..17 | places pins 1 to pin 17 on the top of the symbol | |
| bot:bubble=>reset_n | places pin matching reset_n on the bottom and puts an inversion bubble between the pin and the symbol |
LOCATORS
Valid Locators are mostly obvious, and are explained in the following table
| Locator | Effect |
|---|---|
| LEFT | place matching pins on the Left Hand Side of the symbol |
| RIGHT | place matching pins on the Right Hand Side of the symbol |
| BOTH | distribute the matching pins equally on the Left and Right Hand sides of the symbol |
| TOP | place matching pins on the top side of the symbol |
| BOT or BOTTOM | place matching pins on the bottom side of the symbol |
| AUTO | place matching INPUT pins on the Left Hand Side of the symbol place matching OUTPUT or INOUT pins on the Right Hand Side of the symbol distribute all other pin_types equally on the Left and Right Hand Sides of the symbol |
MODIFIERS
Valid Modifiers are explained in the following table. Modifiers may be further broken down by partBuilder to impart extra information as shown
| MODIFIER | Effect | Special Notes |
|---|---|---|
| DOT or BUBBLE | Instructs PartBuilder to Add an Inversion Bubble in the proper place for any matching pin | |
| CLK or CLOCK | Instructs PartBuilder to Add a clock indicator like '>' in the proper place for any matching pin | |
| SHORT | Instructs PartBuilder to create a SHORT Pin | works for Eagle and Orcad Symbols |
| ZERO | Instructs PartBuilder ORCAD zero Length Pins | |
| HIDDEN | Instructs partBuilder to create a Hidden Pin. | This currently only works with AllegroHDL and is not reccomended |
| VECTOR or VECTORED | Instructs PartBuilder to create one symbol pin to represent 2 or more pins. | This currently only works with AllegroHDL and can be used to significantly reduce the size of power symbols |
| IS_PIN | Instructs PartBuilder that the PIN_MATCH should be applied to the Pin Number instead of the Pin Name | This makes it very easy to build parts where you layout the pins like they appear on the physical symbol. Also very efficient when building connectors organized by row or column |
DPAIR DPAIR_{OPT_SUFFIX} | Instructs PartBuilder to place both the matching diff_pair pin AND its mate pin in sequence | The DPAIR Modifier can be appended with a suffix to impart more information to override the default diff_pair spacing that is configured for partBuilder. |
| PSG_{swapGroupName} | Instructs PartBuilder that the matching pins are a member of a PIN_SWAP_GROUP. PartBuilder maintains a list of all the PIN_SWAP group names and properly annotates the matching pins so they can be included in the PIN_SWAP in the PCB side. | The name of the pinSwapGroup must be provided in the suffix to the PSG_ modifier. This is currentyl supported for AllegroHDL |
PIN_MATCHES
The PIN_MATCH is the string that PartBuilder uses to test all pins in the extracted pinData for a match.
PIN_MATCHES may be entered as a simple string or with a wildcard.
PartBuilder treats all the PIN_MATCHES it extracts from the SDL as a Regular Expression. It actually converts the wildcard '*' internally to the '.*' used in Regular Expressions.
They may also be entered as a valid Perl Regular Expression.
PartBuilder treats all the PIN_MATCHES it extracts from the SDL as a Regular Expression. It actually converts the wildcard '*' internally to the '.*' used in Regular Expressions.
A Regular Expression is a pattern describing a certain amount of Text. The Regular Expression can be very general or very restrictive.
In the simplest context, PartBuilder uses a regular expressions to determine if a Pin contains the PIN_MATCH pattern.
If the PIN_MATCH is entered as "DQ", PartBuilder will match any pin that Contains DQ anywhere in the pinname.
Excellent references for Regular Expressions exist on the web like the one at this link.
PartBuilder Bus-Enhanced Regular Expressions.
PartBuilder does some behind the scenes work to change the PIN_MATCH Regular Expressions to ensure it is easy to work with Bussed Signals.
Its not truly necessary to understand this detail, but In a normal regular expression, the '[]' characters in the pattern match enclose a list of characters to match against
If you were comparing a list of pins dq7 dq6 dq5 dq4 dq3 dq2 dq1 and dq0 using the regularExpression 'dq[0:7]' , the pattern would only match dq0 and dq7 (and funny enough dq:).
In order to work around this, when PartBuilder sees the 'DQ[0:7]' in a PIN_MATCH it expands it to 8 seperate PIN_MATCHES DQ0, DQ1, DQ2... DQ7 which are then used as pattern matches.
It also maintains the order of the bits so that they will be added to the symbol in LSB→MSB order if you enter busName[0:7] or MSB→LSB order if you enter busName[7:0]
Examples of Useful PIN_MATCH Regular Expressions
| PIN_MATCH | Effect | NOTES |
|---|---|---|
| DQ | PartBulder will match any pin that contains DQ | |
| DQS | PartBuilder will match any pin that contains DQS | |
| ^DQS0 | PartBuilder will match any pin that STARTS with DQS0 | the caret '^' enforces the start of word boundary |
| DQ[7:0] | PartBuilder will expand to 8 matches DQ7, DQ6, DQ5... DQ0 it will match any pins that contain any of those strings so DQ7,DRAM_DQ6_BUS,DQ5_F would all match DQA7, DQ06... would not match | In the category of too much information: DQ15 seems like it would match because it contains DQ1, but when partBuilder expands the PIN_MATCH, it adds a fancy regular expression construct called a zero-width lookahead assertion to assure that other bus members outside the range of 7..0 do not match |
| ^DQ[0:7] | PartBuilder will match any pin that STARTS with DQ0 or DQ1... DQ7 L_DQ0 would not match | |
| DQ[0:7]$ | PartBuilder will match any pin that ENDS with DQ0 or DQ1 ... DQ7 DQ0_L would not match since it doesn't end with 0,1,2,3,,4,5,6,or 7 | the dollar Sign '$' enforces the end of word boundary |
| ^DQ[0:7]$ | PartBuilder will expand to a list of matches ^DQ0$, ^DQ1$, ^DQ2$... ^DQ7$ and will only match DQ0,DQ1,DQ2,DQ3...DQ7... Would not match L_DQ0, DQ00, DQ01 ..... | The caret '^' says it must start with the D and the $ says it must end with the digit at the end |
IO_.*?_35 or IO_*_35 | PartBuilder will match any pin that contains IO_, and _35 it would match: IO__35, IO_A_35, IO1_PIN1_35, IO_THIS_IS_A_LONG_NAME_35 it would not match IO_A_36, IO_A_37 nor would it match IO35 or IO_35 (since we need 2 underscores) | the '.*?' (which could also be be entered as '*') looks for any number of any of characters partBuilder converts the '*' to a '.*?' to make it easier to enter wildcards for those not familiar with Regular Expressions. The ? is special and necessary because it makes the match stop if it sees the _35 after it. This particular regular Expression is very powerful when building parts with Pins that have similar names grouped into numeric banks like FPGAs and CPLDS. |
| IO\d+_\d+ | would match: IO0_5, IO7324_8910 Would not match: IO0A_5 because it is not looking for the 'A' or IO_5 because we need a digit after the IO | the \d+ finds 1 or more consecutive digits in a row. if we used IO\d*_\d+, it would match IO_5 because \d* says find 0 or more consecutive digits. |
Add Comment