Step by Step Symbol Creation

CadEnhance recommends using a separate working directory or folder for each Part you are creating. When PartBuilder is installed, it creates a workdir directory under the root install directory,  which is a good place to store part folders, But you can use any folder anywhere on a local or shared drive.

1. Choose a  PART_CONFIG_FILE  

   When PartBuilder is first started, the user will be prompted to select or create a PART_CONFIG_FILE  to work with. Three options are provided, Choose Part, New Part or Copy Part.
   
   
   1. The Choose Part Button should be selected to work on a part that already exists
      1. In this case, the user will be presented with a file browser starting in the CE_WORK_DIR to find and locate an existing PART_CONFIG_FILE (usually named symGenCtl.txt) 
         
         
   2. The New Part Button and Copy Part Buttons popup a new menu allowing the user to start from scratch and create a new part folder and a PART_CONFIG_FILE to work with
      
      
      
      
      1. Choose one of the Selected Operations,  Create New Folder, Copy From Existing Folder, or Copy Template from CadEnhance.
         1. If you are starting from scratch, use the Create New Folder operation, provide a PART_NAME and hit Create New...
            PartBuilder will create a working directory for your part and an empty PINOUT_CONTROL_FILE named symGenCtl.txt which will be used to store all your configuration settings.
            1. If you are starting from scratch, you will have to Enter the NUM_PINS, select
         2. If you have already created a similar part, use the Copy From Existing Folder operation, and provide the new PART_NAME.
            In this case, PartBuilder will copy the existing folder to a new folder under the selected WORKING_DIR named after the Selected PART_NAME.
         3. The Copy Template from CadEnhance operation is another excellent way to get started. CadEnhance provides a growing selection of sample parts that can be downloaded to your WORKING_DIR to give you a head start to create your own customized version of many industry standard parts.
            
            
            

2. Configure the Build Options

   If the user is starting from scratch or had PartBuilder create a copy of an existing folder or  remote sample part, PartBuilder will need to be configured for the new Part using the Highlighted section of the Main Gui:
   
   
   
   
   
   1. Select the PIN_REPORT_TYPE that will be used to supply the pin-data for the part under construction.
      Selecting a PIN_REPORT_TYPE that leads to the least amount of hand editing is one of the most important steps in part creation since
      PartBuilder extracts the Pin Names, Pin Numbers, Pin Types and other critical information from this source. 
      Click on this link for more information about the different types of PIN_REPORT_TYPES:Part Builder Pin Information Sources
      
      
      
      1. Programmable Logic Device (PLD) Types: PLD vendors  provide Package Files and Pin Report files for their FPGA or CPLD devices which  can be downloaded from their websites or generated by one of their tools. PartBuilder can currently process these files  available from Altera, Lattice and Xilinx. 
         1. The Vendor specific PHYSICAL or LOGICAL PIN_REPORT types should be chosen for this type of part. The PHYSICAL PIN_REPORT_TYPE is used to build a very generic set of symbols for a PLD device that can be used in any application while The LOGICAL PIN_REPORT_TYPE provides the most functional symbols in a schematic, but symbols must be created for each application 
            1. See the  FPGA Information Files for more information. 
      2. JTAG Parts: Any part that has JTAG pins (TCK,TDI,TDO,TMS) will have an associated BSDL_FILE  which is usually readily available for download from the vendors website. These files provide an accurate description of all of the device pins.
         1. The BSDL FILE PIN_REPORT_TYPE should be chosen to create this type of part. 
         2. It is worth noting that many of the vendors that provide a BSDL_FILE for their part tend to lock their PDF files so that pin data cannot be cut and pasted.
      3. IBIS MODELS: Most vendors provide IBIS signal integrity simulation models for their devices which are also readily available from their website or by request. This is another excellent source of the part pin data. 
         1. The IBIS_FILE PIN_REPORT_TYPE should be chose to create a part from the IBIS model file.
      4. Existing Symbol Files: PartBuilder can read existing symbol files to extract pin data. This is quite useful if you want to re-draw a set of symbols or migrate existing symbols from one EDA tool to another. 
         1. The CHIPS_PRT_FILE PIN_REPORT_TYPE is used to read the pinout from an existing Allegro symbol file. Chip Vendors sometimes use the chips.prt file to capture their device pinouts internally and provide an excellent means for the vendor to build symbols for their own parts
      5. Spreadsheets:  In some cases, vendors may also provide an excel spreadsheet describing the pin data. If not, the spreadsheet can be created from the   pdf datasheet. PartBuilder provides the GENERIC_CSV, SIMPLE_BGA and PIN_NUM_TYPE  PIN_REPORT_TYPES to enable extraction of pin data from these types of files. 
         1. The free online tool: https://www.pdftoexcelonline.com/ is very useful to convert the pdf to excel tables for easy and accurate manipulation within a spreadsheet program.
         2. When manually cutting and pasting pin Information from a PDF DataSheet into a spreadsheet, cadEnhance recommends using the free Foxit Reader PDF reader available from: https://www.foxitsoftware.com/products/pdf-reader/ instead of the Adobe Acrobat reader. The Foxit Reader does a much better job of maintaining the source data formatting in cut and paste operations whereas Acrobat tends to mangle the order and format of the data. 
            
            
   2. Each PIN_REPORT_TYPE requires its own set of configuration settings. All of the settings may not be available on the Main GUI, so the More Part Config Settings button is provided to enable the user to choose the extra options. 
      
      
      
      
      
      
      1. This menu can also be used to create a set of SIG_RENAME_RULES, define the DIFF_PAIR identification rules, and select an input file to provide PIN_DELAY data for the created part.
         1. The Diff Pair Search Options allow the user to tell PartBuilder how to identify diff_pair pins within the pin data. Configuring the Diff Pairs properly at the start makes the Smart-Frac feature even more efficient when grouping pins together in MATCH_STATEMENTS  
         2. The SIG_RENAME_RULES entry allows the user to make changes to pin names to make them more descriptive or better fit your naming standards without having to touch the input data file
         3. The PIN_DELAY Section enables the user to select a file specifying pin_delays for each pin, and instruct PartBuilder as to how the pin delay information is organized in rows/columns
      2. Most of these functions are also available in the PIN-EXPLORER GUI as well which provides more interactive support.
   3. If pin types are not provided or improperly defined in the input PIN_REPORT_FILE, use the PIN_EXPLORER function to easily define a PIN_TYPE_OVERRIDE file 
      
      
      

3. Use SMART-FRAC  to create the initial Symbol Description Language (SDL) Templates

   
   
   
   1. After the pin data has been read in successfully, any desired signal renaming rules have been created, and any required pin_type_override rules have been entered,
      The SMART-FRAC Operation can  be run to create the initial SDL Templates. 
   2. SMART-FRAC does the work a user would normally do to sort and organize pins, by name, busses, diff_pairs and busses of diff_pairs.
   3. For most parts, it creates one symbol placeholder for all the power pins, and another symbol placeholder for the remaining signal pins
      1. It places Inputs on the Left, Outputs on the right and leaves the Power and Inout or Bidirectional pins with a CHOOSE_SIDE
         modifier so that the user can locate them where they want.
   4. For FPGAs and CPLDS, SMART-FRAC will create a symbol for each IO BANK, and each XCVR BANK.
   5. When Converting symbols from one EDA tool to antother, SMART-FRAC creates the SDL to describe the location of every pin in every symbol from the original EDA tool.
   6. SMART-FRAC is normally run once or twice at the beginning of symbol creation until a suitable template is created. 
   7. Once a template gets converted to the real working SDL file, the user would not want to overwrite it with the Template,
      and PartBuilder takes precautions to prevent this from happening.
      
      
      

4. Use the SDL Editor to edit the SYMBOL DESCRIPTION LANGUAGE (SDL) 

   
   
   
   
   1. In order to create symbols, the user must choose a valid side for any pin-match labelled CHOOSE_SIDE
   2. To build a complete part with error checking, the final SDL file must configure a location for every the pins extracted from the PIN_REPORT_FILE
   3. The user can choose to build symbols incrementally by setting the BUILD_PARTIAL_SYMBOLS Config setting
      
      1. Note The `EXIT pre-processor command can be used to tell PartBuilder to ignore all the SDL after the line that the `EXIT has been entered on.
   4. The Green Arrow at the upper right of the SDL-Editor can be used to interactively build the symbols 

5. Select the EDA Tools and then Double Click the BUILD_SYMBOLS Operation
   
   

   

   1. Monitor the Status Window for Warnings/Errors. 
      PartBuilder stops the building process if it detects significant errors that would make the final part unusable in the downstream EDA tool
      1. You can still progress manually by double clicking then next step in the build process menu
      2. This allows you to work on the symbols incrementally 
         
         

6. View the Created Symbols... Use the View Symbol Menu Button and select either the AllegroHDL or dxDesigner Symbol

   
   

   
   
   In the current release (to v18.9.1)  PartBuilder only supports the viewer for AllegroHDL and dxDesigner symbols, so the user will want to enable one of those tools for symbol creation even if the final EDA tool is Orcad or something else.  The symbol created for the other EDA tools will be very similar in form and fit to the AllegroHDL or dxDesigner symbol
   
   
   1. The symbol viewer will pop up and allow you to browse through the multiple symbols you have created
      

7. Tweak any symbol spacing layouts to get the symbols you want by editing the SDL file

   1. re-run the BUILD_SYMBOLS operation until you are satisfied with the created symbols
      
      

8. Before the parts is finished, you will need to Configure the Properties that will be added to the final part

   
   
   1. Configure and Enter the Property Values and Locations for each EDA tool you will generate a part for.
   2. Optionally use the Read Part Property Templates button to let PartBuilder "learn" the property Standards your company uses when building symbols
   3. After the properties have been modified, the user will Rerun the BUILD_SYMBOLS operation again to fix the property content for the released symbols.
      1. This is a very quick operation and the user may do this several times to optimize the property content and placement of the properties.
         
         
   4. Property configurations can be stored in the site_prop_loc_ctl.txt file in the directory pointed to by the CE_SITE_DIR config setting, so that they can be applied to all new parts
      
      

9. Copy the Generated Symbol files to the Release Library using the Release Symbols button on the Main Gui

   
   
   
   
   
   1. The Release Directory can be stored locally for the part or in the SITE_SETTINGS file.