Cadstar RINF Netlist

Owned by Bill OLeary
Last updated: Mar 07, 2019
1 min read

Example CadStar (RINF) File

Below is a sample CadStar RINF file created by NetBom from an AllegroHDL netlist. The RINF has been edited to compress most of the information in order to provide a summary of the contents and structure of a typical RINF file format.

Example RINF file

 .HEA
.TIM 2016 5 5 11 36 29
.APP "CadEnhance RINF Output - Version 6.0.1.2"
.UNI INCH 1000.0 in
.TYP FULL
    
.ADD_TER	J1	74	"A01_A23<0>"	#(PNAME:A01_A23<0>)    
.TER		U7	W10		#(PNAME:DA0)                     
		U8	W2		#(PNAME:DA0)                        
.ADD_TER	J1	194	"A01_A23<10>"	#(PNAME:A01_A23<10>)
.TER		U7	R10		#(PNAME:DA10)
		U8	R2		#(PNAME:DA10)
.ADD_TER	J1	60	"A01_A23<11>"	#(PNAME:A01_A23<11>)
.TER		U7	V2		#(PNAME:DA11)
		U8	V10		#(PNAME:DA11)
.ADD_TER	J1	59	"A01_A23<12>"	#(PNAME:A01_A23<12>)
.TER		U7	U1		#(PNAME:DA12)
		U8	U11		#(PNAME:DA12)
.ADD_TER	J1	72	"A01_A23<13>"	#(PNAME:A01_A23<13>)
.TER		U7	U10		#(PNAME:DA13)
		U8	U2		#(PNAME:DA13)
.ADD_TER	J1	179	"A01_A23<14>"	#(PNAME:A01_A23<14>)
.TER		U7	R2		#(PNAME:DA14)
		U8	R10		#(PNAME:DA14)
.ADD_TER	J1	180	"A01_A23<15>"	#(PNAME:A01_A23<15>)
.TER		U7	R3		#(PNAME:DA15)
		U8	R9		#(PNAME:DA15)
#
#
#
.ADD_TER	R20_W0	2	"DDR3_VTT1"	#(PNAME:B)
.TER		R19_W0	2		#(PNAME:B)
		R21_W0	2		#(PNAME:B)
		R22_W0	2		#(PNAME:B)
		R23_W0	2		#(PNAME:B)
		R25_W0	2		#(PNAME:B)
		R26_W0	2		#(PNAME:B)
		R24_W0	2		#(PNAME:B)
		R27_W0	2		#(PNAME:B)
		R28_W0	2		#(PNAME:B)
		R29_W0	2		#(PNAME:B)
		R30_W0	2		#(PNAME:B)
.
.
.
		U2	3		#(PNAME:VO)
		C36	1		#(PNAME:A)
		C37	1		#(PNAME:A)
		C38	1		#(PNAME:A)
		NS3	2		#(PNAME:B)
		R18	1		#(PNAME:A)

.ADD_TER	J1	1	"GND"	#(PNAME:GND_1)
.TER		J1	28		#(PNAME:GND_10)
		J1	31		#(PNAME:GND_11)
		J1	34		#(PNAME:GND_12)
		J1	37		#(PNAME:GND_13)
		J1	40		#(PNAME:GND_14)

		C58	2		#(PNAME:B)
		C64	2		#(PNAME:B)
		C65	2		#(PNAME:B)
.ADD_TER	J1	135	"I2C_ALERT_F"	#(PNAME:I2C_ALERT)
.TER		U5	11		#(PNAME:IRQ_F)
.ADD_TER	J1	131	"I2C_SA<0>"	#(PNAME:I2C_SA<0>)
.TER		U4	1		#(PNAME:SA0)
.ADD_TER	J1	132	"I2C_SA<1>"	#(PNAME:I2C_SA<1>)
.TER		U4	2		#(PNAME:SA1)
.ADD_TER	J1	134	"I2C_SA<2>"	#(PNAME:I2C_SA<2>)
.TER		U4	3		#(PNAME:SA2)
.ADD_TER	J1	128	"I2C_SCL"	#(PNAME:I2C_SCL)
#
#
#
.ADD_TER	J1	80	"WE01_WE23"	#(PNAME:WE01_WE23)
.TER		U7	V11		#(PNAME:DWE)
		U8	V1		#(PNAME:DWE)

.END


  • The RINF Netlist starts with
    • .HEA header,
    • .TIM timestamp
    • .APP comment which shows this was generated by a CadEnhance Tool
    • .UNI (units)
    • TYP (type)
  • EACH NET STARTS with an .ADD_TER directive with the first pin in the net, and the netName
  • Following that is the .TER directive and a list of all the other pins on the net 
  • THE #(PNAME:XXX) is a cadEnhance add-on comment which shows the pinName of the actual pin. This is helpful when checking the netlist for proper connectivity. This is not standard format, and will only be included if the ADD_PIN_NAME_IN_RINF ctlVariable is set from the checkbutton on the main menu.
  • The .End directve ends the netlist